View STV7610A_226897.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

STV7610A
PLASMA DISPLAY PANEL DATA DRIVER
. . . . . . . . .
PRELIMINARY DATA
96 OUTPUTS PLASMA DISPLAY DRIVER 100V ABSOLUTE MAXIMUM SUPPLY 5V SUPPLY FOR LOGIC 60/50mA SOURCE / SINK OUTPUT MOS 50/60mA SOURCE / SINK OUTPUT DIODE 6 BIT CASCADABLE DATA BUS (20MHz) BLANK, POLARITY CONTROL BCD TECHNOLOGY PACKAGING TQFP144 (see Note) OR DICE
Note : TQFP144 packaging only available for engineering samples.
TQFP144 (20 x 20 x 1.4 mm) (Thin Plastic Quad Flat Pack) ORDER CODE : STV7610A
DESCRIPTION The STV7610A is a BCD data driver for Plasma Display Panel (PDP). Using a 6-bit wide cascadable data bus, it addresses 96 high current & high voltage outputs. By serialy connecting several STV7610A, any horizontal pixel definition can be performed. The 20MHz shift clock gives an equivalent 120MHz shift register. The STV7610A is supplied with a separated 90V power output supply and a 5V logic supply. All command inputs are CMOS compatible.
November 1998
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/13
STV7610A
PIN CONNECTIONS (DIE Pinout)
OUT63 OUT62 OUT61 OUT60 OUT59 OUT58 OUT57 OUT56 OUT55 OUT54 OUT53 OUT52 OUT51 OUT50 OUT49 OUT48 OUT47 OUT46 OUT45 OUT44 OUT43 OUT42 OUT41 OUT40 OUT39 OUT38 OUT37 OUT36 OUT35 OUT34
VSSP VPP VPP OUT64 OUT65 OUT66 OUT67 OUT68 OUT69 OUT70 OUT71 OUT72 OUT73 OUT74 OUT75 OUT76 OUT77 OUT78 OUT79 OUT80 OUT81 OUT82 OUT83 OUT84 OUT85 OUT86 OUT87 OUT88 OUT89 OUT90 OUT91 OUT92 OUT93 OUT94 OUT95 OUT96 (0,0) X Y
VSSP VPP VPP OUT33 OUT32 OUT31 OUT30 OUT29
STV7610A Bare Die
OUT28 OUT27 OUT26 OUT25 OUT24 OUT23 OUT22 OUT21 OUT20 OUT19 OUT18 OUT17 OUT16 OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1
7610A-01.EPS
POL
STB
CLK
F/R
B6
B5
B4
B3
B2
B1
A1
A2
A3
A4
A5
VSSLOG
BLK
VSSP
A6
2/13
VSSSUB
VSSP
VCC
VPP
VPP
STV7610A
PIN CONNECTIONS (TQFP Pinout)
OUT63 OUT62 OUT61 OUT60 OUT59 OUT58 OUT57 OUT56 OUT55 OUT54 OUT53 OUT52 OUT51 OUT50 OUT49 OUT48 OUT47 OUT46 OUT45 OUT44 OUT43 OUT42 OUT41 OUT40 OUT39 OUT38 OUT37 OUT36 OUT35 OUT34 VSSP VSSP 109
108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93
NC
NC
NC 111
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
VPP VPP NC OUT64 OUT65 OUT66 OUT67 OUT68 OUT69 OUT70 OUT71 OUT72 OUT73 OUT74 OUT75 OUT76 OUT77 OUT78 OUT79 OUT80 OUT81 OUT82 OUT83 OUT84 OUT85 OUT86 OUT87 OUT88 OUT89 OUT90 OUT91 OUT92 OUT93 OUT94 OUT95 OUT96
110
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
VPP VPP NC OUT33 OUT32 OUT31 OUT30 OUT29 OUT28 OUT27 OUT26 OUT25 OUT24 OUT23 OUT22 OUT21 OUT20 OUT19 OUT18 OUT17 OUT16 OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1
STV7610A TQFP144
92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
3/13
7610A-02.EPS
CLK
POL
STB
B6
B5
B4
B3
B2
B1
F/R
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VSSLOG
BLK
VSSP
NC
VSSSUB
VSSP
VCC
VPP
NC
A1
A2
A3
A4
A5
VPP
A6
STV7610A
PIN LIST (TQFP144)
Pin N 3-37-38-39-41-43-48-65-67-69-70 71-72-106-110-111-142-143 1-2-42-66-107-108 53 40-68-109-144 54 55 73 to 105 112 to 141 4 to 36 50 51 52 56 57 59 to 64 44 to 49 Symbol VPP VCC VSSP VSSLOG VSSSUB OUT1 to OUT33 OUT34 to OUT63 OUT64 to OUT96 BLK POL FOR/REV CLK STB A1 to A6 B6 to B1 Type NC Supply Supply Ground Ground Ground Output Output Output Input Input Input Input Input Input/Output Input/Output High Voltage Supply of Power Outputs 5V Logic Supply Ground of Power Outputs Logic Ground Substrate Ground Power Output Power Output Power Output Blanking Input Polarity Input Selection of Shift Direction Clock of Data Shift Register Forward Shift Register Input Forward Shift Register Output
7610A-01.TBL
Description
Latch of Data To Outputs
PIN LIST (Power outputs)
Output N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pin N 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 Output N 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin N 97 98 99 100 101 102 103 104 105 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 Output N 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Pin N 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 4 5 6 7 8 9 10 11 12 Output N 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 Pin N 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
7610A-02.TBL
33 34 35 36
4/13
STV7610A
PAD COORDINATES (in m) Pad positions from the middle of the top side
Name OUT 48 OUT 47 OUT 46 OUT 45 OUT 44 OUT 43 OUT 42 OUT 41 OUT 40 OUT 39 OUT 38 OUT 37 OUT 36 OUT 35 OUT 34 Center X 74.0 210.0 346.0 482.0 618.0 754.0 890.0 1026.0 1162.0 1298.0 1434.0 1570.0 1706.0 1842.0 1993.0 Y 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 3034.0 x 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 Size y 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 OUT 14 OUT 13 OUT 12 OUT 11 OUT 10 OUT 9 OUT 8 OUT 7 OUT 6 OUT 5 OUT 4 OUT 3 OUT 2 OUT 1 Name Center X Y 2117.0 -1004.0 2117.0 -1140.0 2117.0 -1276.0 2117.0 -1412.0 2117.0 -1548.0 2117.0 -1684.0 2117.0 -1820.0 2117.0 -1956.0 2117.0 -2092.0 2117.0 -2228.0 2117.0 -2364.0 2117.0 -2500.0 2117.0 -2636.0 2117.0 -2832.0 Size x 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 y 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0
Pad positions along the bottom side
Name Center X 1904.0 1698.0 1499.0 1349.0 1199.0 1049.0 899.0 749.0 449.0 299.0 156.5 3.0 -158.0 -299.0 -449.0 -599.0 -749.0 -899.0 -1049.0 -1199.0 -1349.0 -1499.0 -1698.0 -1904.0 Y -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 -3034.0 x 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 Size y 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0
Pad positions along the right side
Name VSSP VPP VPP OUT 33 OUT 32 OUT 31 OUT 30 OUT 29 OUT 28 OUT 27 OUT 26 OUT 25 OUT 24 OUT 23 OUT 22 OUT 21 OUT 20 OUT 19 OUT 18 OUT 17 OUT 16 OUT 15 Center X 2116.0 2029.8 2041.5 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 2117.0 Y 2795.5 2496.5 1843.0 1580.0 1444.0 1308.0 1172.0 1036.0 900.0 764.0 628.0 492.0 356.0 220.0 84.0 2117.0 2117.0 -324.0 -460.0 -596.0 -732.0 -868.0 x 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 Size y 80.0 90.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0
VSSP VPP A6 A5 A4 A3 A2 A1 STB CLK GNDsub GND VCC F/R POL BLK B1 B2 B3 B4 B5 B6 VPP VSSP
5/13
STV7610A
PAD COORDINATES (in m) (continued) Pad positions along the left side
Name OUT 96 OUT 95 OUT 94 OUT 93 OUT 92 OUT 91 OUT 90 OUT 89 OUT 88 OUT 87 OUT 86 OUT 85 OUT 84 OUT 83 OUT 82 OUT 81 OUT 80 OUT 79 OUT 78 OUT 77 OUT 76 OUT 75 OUT 74 OUT 73 OUT 72 OUT 71 OUT 70 Center X -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 -2117.0 Y -2832.0 -2636.0 -2500.0 -2364.0 -2228.0 -2092.0 -1956.0 -1820.0 -1684.0 -1548.0 -1412.0 -1276.0 -1140.0 -1004.0 -868.0 -732.0 -596.0 -460.0 -324.0 -188.0 -52.0 84.0 220.0 356.0 492.0 628.0 764.0 x 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 Size y 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 Name OUT 69 OUT 68 OUT 67 OUT 66 OUT 65 OUT 64 VPP VPP VSSP Center X Y -2117.0 900.0 -2117.0 1036.0 -2117.0 1172.0 -2117.0 1308.0 -2117.0 1444.0 -2117.0 1580.0 -2041.5 1843.0 -2029.8 2496.5 2116.0 2795.5 Size x 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 y 80.0 80.0 80.0 80.0 80.0 80.0 80.0 90.0 80.0
Pad positions along the top side
Name OUT 63 OUT 62 OUT 61 OUT 60 OUT 59 OUT 58 OUT 57 OUT 56 OUT 55 OUT 54 OUT 53 OUT 52 OUT 51 OUT 50 OUT 49 Center X Y -1980.5 3034.0 -1830.0 3034.0 -1694.0 3034.0 -1558.0 3034.0 -1422.0 3034.0 -1286.0 3034.0 -1150.0 3034.0 -1014.0 3034.0 -878.0 3034.0 -742.0 3034.0 -606.0 3034.0 -470.0 3034.0 -334.0 3034.0 -198.0 3034.0 -62.0 3034.0 Sizy x 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 80.0 y 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0 90.0
6/13
STV7610A
BLOCK DIAGRAM
CLK 56 FOR/REV 52 VCC 16-BIT SHIFT REGISTER A1 59
P1 P91
49 B1
16-BIT SHIFT REGISTER A2 60
P2 P92
48 B2
16-BIT SHIFT REGISTER A3 61
P3 P93
47 B3
16-BIT SHIFT REGISTER A4 62
P4 P94
46 B4
16-BIT SHIFT REGISTER A5 63
P5 P95
45 B5
A6 64
16-BIT SHIFT REGISTER
P6 P96
44 B6
P1
P6
P95 P96
STB 57
Q1 Q2
LATCH
Q95Q96
54 VSSLOG 55 VSSSUB 53 VCC
VCC POL 50 VCC BLK 51 LOGIC
VSSP Pins 40-68-109-144 VPP Pins 1-2-42-66-107-108
73 OUT1
36 OUT96
7/13
7610A-03.EPS
STV7610A
STV7610A
CIRCUIT DESCRIPTION The STV7610A contains all the logic and the power circuits necessary to drive the columns of a Plasma Display Panel (P. D. P.). The binary value of each pixel of the displayed line is loaded into the shift register. Data are input in a 6-bit wide data bus to A1 - A6 input (case of forward shift mode). Data are shifted at each low to high transition of the CLK shift clock. After 16 shifts the first data are available on B1 - B6 outputs. These B1 - B6 outputs can be used to cascade several drivers to perform any horizontal resolution. The forward/reverse (FOR/REV) input is used to select the direction of the shift register, A1 - A6 and B1 - B6 data bus input/output status is set according to the selected direction. FOR/REV = H , A is an input and B is an output. Serial inputs, CLK, STB inputs are Smith trigger inputs. If not used in the application, Blanking (BLK), Polarity (POL) are internaly pulled to level "H". The maximum frequency of the shift clock is 20MHz. This leads to an equivalent 120MHz serial shift register. On low level of STB, data is transferred from shift register to the latch stage. Data will not be refreshed as long as STB is kept high. Blanking input (BLK) forces the power outputs to low level when pulled low. All the power outputs are set at high level when the Polarity command (POL) is pulled low and the Blanking (BLK) input is at high level. VSSSUB and VSSLOG must be connected as close as possible to the logical reference ground of the application. Shift Register Truth Table
Input FOR/REV H H L L CLK Rise H or L Rise H or L Input/Output A IN IN OUT OUT B OUT OUT IN IN Shift Register Function Output Q Forward shift Steady Reverse Shift Steady
Power Output Truth Table
Qn X X X L H STB X X H L L BLK L H H H H POL X L H H H Driver Output L H Qn L H Comments Output low Output high Data latched Data copied Data copied
Qn+1 = A1, Qn+2 = A2, Qn+3 = A3, Qn+4 = A4, Qn+5 = A4, Qn+6 = A6, n = [0,6,12,18,...,90]
8/13
STV7610A
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VPP VIN VOUT IPOUT IDOUT Tj Toper Tstg Parameter Logic Supply Range (Pin 53) Driver Supply Range (Pins 1, 2, 42, 66, 107, 108) Logic Input Voltage (Pins 50, 51, 52, 56, 57, 59 to 64) Logic Output Voltage (Pins 44 to 49) Driver Output Current (1) (3) Diode Output Current (2) (3) Junction Temperature(3) Operating Temperature Storage Temperature Value -0.3, +7 -0.3, +100 -0.3, +VCC +0.3 -0.3, +VCC +0.3 -60 / +50 -50 / +60 +150 -20, +85 -50, +150 Unit V V V V mA mA o C o C o C
Notes : 1. Through one power output (all power outputs). 2. Through one power output for all power outputs (see Test Diagram) with Junction Temperature lower or equal than Tjmax. 3. These parameters are measured during ST's internal qualification which includes temperature characterisation on standard batches and on corners batches of the process. These parameters are not tested on the parts.
Symbol Rth (j-a)
Parameter Junction-ambient Thermal Resistance Typ.
Value 35
Unit
o
C/W
ELECTRICAL CHARACTERISTICS (VCC = 5V, VPP = 90V, VSSP = 0V, VSSLOG = 0V, VSSSUB = 0V, Tamb = 25C, fCLK = 20MHz, unless otherwise specified)
Symbol SUPPLY VCC ICCH ICCD VPP IPPH Logic Supply Voltage Logic Supply Current (all inputs high) Logic Dynamic Supply Current Power Output Supply Voltage Power Output Supply Current (steady outputs) fCLK = 20MHz 4.5 15 5 26 5.5 100 90 100 V A mA V A Parameter Test Conditions Min. Typ. Max. Unit
OUTPUT (VPP = 15V to 90V) OUT1-OUT96 VPOUTH VPOUTL VDOUTH VDOUTL VOH VOL INPUT CLK, FOR/REV, STB, POL, BLK, A1-A6, B1-B6 VIH VIL IIH IIL Input Voltage (High Level) Input Voltage (Low Level) High Level Input Current Low Level Input Current CLK, A1-A6, B1-B6, STB FOR/REV, BLK, POL VIH = VCC VIL = 0V -10 -40 0.8 VCC 0.2 VCC 10 V V A A A
7610A-05.TBL
Power Output Voltage Drop (High Level) (versus VPP) Power Output Voltage drop (Low level) Output Diode Voltage (High Level) Output Diode Voltage (Low Level) Logic Output (High Level) Logic Output (Low Level)
IPOUTH = -30mA IPOUTH = -45mA IPOUTL = +30mA IDOUTH = +45mA (4) IDOUTL = -30mA (4) IOH = -1mA IOL = +1mA
4 -
4.0 4.5 1.6 1.05 -0.95 4.2 0.12
4 4 4 0.4
V V V V V V V
A1-A6, B1-B6
Notes : 4. See test diagram page 11.
9/13
7610A-04.TBL
THERMAL DATA
7610A-03.TBL
STV7610A
AC TIMINGS REQUIREMENTS (VCC = 4.5V to 5.5V, Tamb = -20 to +85C, input signals max leading edge & trailing edge (tR, tF) = 10ns)
Symbol tWHCLK tWLCLK tSDAT tHDAT tSFR tDSTB tSSTB tSTB tBLK tPOL Parameter Duration of clock (CLK) pulse at high level Duration of clock (CLK) pulse at low level Set-up Time of data input before clock (low to high) transition Hold Time of data input after clock (low to high) transition Forward/Reverse (FOR/REV) Set-up Time before clock (low to high) transition Minimum Delay to latch (STB) after clock (low to high) transition Minimum Delay to latch (STB) before clock (low to high) transition Latch (STB) Low Level Pulse Duration Blank (BLK) Pulse Duration Polarity (POL) Pulse Duration Min. 15 15 10 10 100 10 10 20 500 500 Typ. Max. Unit ns ns ns ns ns ns ns ns ns ns
7610A-06.TBL 7610A-07.TBL
AC TIMING CHARACTERISTICS (VCC = 5V, VPP = 90V, VSSP = 0V, VSSLOG = 0V, VSSSUB = 0V, Tamb = 25C) (VIL(Max.) = 0.2VCC, VIH(Min.) = 0.8VCC, VOH = 4.0V, VOL = 0.4V, unless otherwise specified)
Symbol tCLK tRDAT tFDAT tPHL1 tPLH1 tPHL2 tPLH2 tPHL3 tPLH3 tPHL4 tPLH4 tROUT tFOUT Data Clock Period Logical Data Output Rise Time (CL = 10pF) Logical Data Output Fall Time (CL = 10pF) Delay of Logic data output (high to low transition) after clock (CLK) transition Delay of Logic data output (low to high transition) after clock (CLK) transition Delay of power output change (high to low transition) after clock (CLK) transition Delay of power output change (low to high transition) after clock (CLK) transition Delay of power output change (high to low transition) after Latch (STB) transition Delay of power output change (low to high transition) after Latch (STB) transition Delay of power output change (high to low transition) after Blank or Polarity (BLK, POL) transition Delay of power output change (low to high transition) after Blank or Polarity (BLK, POL) transition Power Output Rise Time (5) Power Output Fall Time (5) Parameter Min. 50 Typ. Max. Unit 12 11 30 30 135 80 115 70 100 55 50 80 60 60 180 180 165 165 160 160 300 300 ns ns ns ns ns ns ns ns ns ns ns ns ns
Notes : 5. One output among 96, loading capacitor CL = 50pF, other outputs at low level.
10/13
STV7610A
Figure 1 : AC Characteristics Waveform
tCLK tWHCLK tWLCLK "1" CLK 50% 50% tSDAT 50% "0" tHDAT "1" A INPUT 50% tPHL1 "1" 90% 10% "0" tRDAT tSTB tDSTB "1" STB 50% 50% "0" tSSTB F/R "0" tPHL3 90% 10% tPLH3 tBLK "1" BLK (POL = #0#) 50% tPLH4 90% OUTn 10% "0" 50% "0" tPHL4
7610A-04.EPS
50% "0"
tFDAT B OUTPUT 90% 10%
tPLH1
tSFR "1"
tPHL2 "1" 90% 10% "0" tPLH2
OUTn
"1"
Figure 2 : Test Configuration
VPP = VSSP
VPP = VSSP
VDOUTH
IDOUTL
VDOUTL VSSP VSSP
IDOUTL
Output sinking current as positive value, sourcing current as negative value
11/13
7610A-05.EPS
STV7610A
INPUT/OUTPUT SCHEMATICS Figure 3 : POL, BLK, F/R Input
VCC
Figure 4 : CLK, STB Input
VCC
VCC
VCC
CLK, STB Pins 56, 57
POL, BLK, F/R Pins 51, 50, 52
GNDLOG
7610A-06.EPS
GNDSUB
GNDSUB
Figure 5 : A1 to A6, B1 to B6
VCC VCC
Figure 6 : Power Output
VPP
A1 to A6, B1 to B6 Pins 59 to 64, 49 to 44
VCC GNDLOG
7610A-08.EPS
OUT1 to OUT 96 Pins 73 to 105, 112 to 141, 4 to 36
7610A-09.EPS
GNDSUB
VSSP
12/13
7610A-07.EPS
GNDLOG
STV7610A
PACKAGE MECHANICAL DATA 144 PINS - THIN PLASTIC QUAD FLAT PACK (TQFP)
A A2 144 e A1 109 0,076 mm 0.03 inch SEATING PLANE
1
108
36
73
E3 E1 E
37
D3 D1 D
72
L1
B
c
K
0,25 mm .010 inch GAGE PLANE
Dimensions A A1 A2 B C D D1 D3 e E E1 E3 L L1 K
Min. 0.05 1.35 0.17 0.09
Millimeters Typ.
1.40 0.22 22.00 20.00 17.50 0.50 22.00 20.00 17.50 0.60 1.00
Max. 1.60 0.15 1.45 0.27 0.20
Min. 0.002 0.053 0.0067 0.0035
Inches Typ.
0.055 0.0087 0.866 0.787 0.689 0.020 0.866 0.787 0.689 0.024 0.039
Max. 0.063 0.006 0.057 0.011 0.008
0.45
0.75
0.018
0.030
1A.TBL
0o (Min.), 7o (Max.)
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1998 STMicroelectronics - All Rights Reserved Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com
13/13
PM-1A.EPS
L

▲Up To Search▲

Price & Availability of STV7610A

	To Download STV7610A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .